In recent years, there has widely been utilized a parallel computing technology contrived to speed up processing by distributing one task with processors serving as a plurality of arithmetic processing devices. In this type of parallel computing system, there are processor connection systems classified into a system called a loosely-coupled multiprocessor system in which plural computers are connected via a network and a system called a tightly-coupled multiprocessor system in which the processors are coupled at a bus level. Further, a chip multiprocessor (CMP) configured by integrating a plurality of processors on the same chip was utilized and has reached a spread.
Further, technologies with respect to the CMP appear on the market, such as a DVFS (Dynamic Voltage and Frequency Scaling) technology of operating the processor in the way of dynamically varying a clock frequency and a voltage on a processor-by-processor basis and a technology of operating some of the plurality of processors at a high speed in excess of a rated operating frequency if there is an allowance for thermal design electric power of whole chips of these processors.
Herein, when a certain task is processed by the parallel computing system, e.g., an operating system (OS) at first divides the task into proper processing units. The processing units are considered to be a program, a process, a thread and so on. Supposing that the task is divided into the threads, this task allocates the divided threads to the plurality of processors, and the threads are processed in parallel. Then, the task waits till each processor completes processing and moves to a next process. Incidentally, an event that the task etc. waits for each processor to complete the processing is also termed “taking synchronization”. Thus, a distributed processing method by which the plurality of processors processes the threads etc. in parallel enables the parallel computing system to execute the processing at the high speed.